74HC373D (Octal D-type transparent latch, 3-state, Non-Inverting) - www.tme.vn - Linh kien dien tu, Kit Phat trien, Máy nap, Dụng cụ...

Product description

The 74HC373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.

The 74HC373 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches.

The 74HC373 consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D input changes.

When LE is LOW the latches store the information that was present at the D inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the highimpedance OFF-state. Operation of the OE input does not affect the state of the latches.

The 74HC373 is functionally identical to:

74HC563: but inverted outputs and different pin arrangement
74HC573: but different pin arrangement

Features

33-state non-inverting outputs for bus oriented applications
Common 3-state output enable input
Functionally identical to the 74HC563; 74HCT563 and 74HC573; 74HCT573
ESD protection

**Specifications:**
Manufacturer	NXP Semiconductors
Family	Logic - Latches
Series	74HC
Logic Type	D-Type Transparent Latch
Output Type	Tri-State
Number of Circuits	8
Number of Output Lines	8
Propagation Delay Time	35 ns
Polarity	Non-Inverting
Independent Circuits	1
Current - Output High, Low	7.8mA, 7.8mA
Voltage - Supply	2 V ~ 6 V
Operating Temperature	-40°C ~ 125°C
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295", 7.50mm Width)
Packaging	Tape & Reel (TR)
Edit by	www.tme.vn
update on www.tme.vn	16 / 04 / 2012

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